A course is the basic teaching unit, it's design as a medium for a student to acquire comprehensive knowledge and skills indispensable in the given field. A course guarantor is responsible for the factual content of the course.
For each course, there is a department responsible for the course organisation. A person responsible for timetabling for a given department sets a time schedule of teaching and for each class, s/he assigns an instructor and/or an examiner.
Expected time consumption of the course is expressed by a course attribute extent of teaching. For example, extent = 2 +2 indicates two teaching hours of lectures and two teaching hours of seminar (lab) per week.
At the end of each semester, the course instructor has to evaluate the extent to which a student has acquired the expected knowledge and skills. The type of this evaluation is indicated by the attribute completion. So, a course can be completed by just an assessment ('pouze zápočet'), by a graded assessment ('klasifikovaný zápočet'), or by just an examination ('pouze zkouška') or by an assessment and examination ('zápočet a zkouška') .
The difficulty of a given course is evaluated by the amount of ECTS credits.
The course is in session (cf. teaching is going on) during a semester. Each course is offered either in the winter ('zimní') or summer ('letní') semester of an academic year. Exceptionally, a course might be offered in both semesters.
The subject matter of a course is described in various texts.
NI-MCC Multicore CPU Computing Extent of teaching: 2P+1C Instructor: Šimeček I., Langr D. Completion: Z,ZK Department: 18104 Credits: 5 Semester: Z Annotation:
Students will get acquainted in detail with hardware support and programming technologies for the creation of parallel multithreaded computations on multicore processors with shared and virtually shared memories, which are today the most common computing nodes of powerful (super)computer systems. Students will gain knowledge of architecturally specific optimization techniques used to reduce the performance drop due to the widening gap between the computational requirements of multi-core CPUs and memory interface throughput. On specific non-trivial multithreaded programs, students will also learn the basics of the art of creating these applications.
Lecture syllabus:
1. Multiprocessor, multicore, and multithreaded architectures. 2. - 3. (2) Optimization of serial codes. 4. Models of relaxed consistency of shared memory. 5. Optimization of synchronizing operations in multithreaded algorithms. 6. Memory allocators for parallel computations. 7. Using SIMD computations on nowadays processors 8. Shared memory, memory locations, shared and exclusive access, atomic operations. 9. Atomic operations. 10. Ordering of memory operations, and memory models. 11. Spinlock, cache coherence, scalable memory allocators. 12. Threads and C++, thread pools. Seminar syllabus:
Labs are aimed at tasks related to lectures; the lecturer gives hints and he is prepared for a discussion about tasks.Literature:
1. Solihin, Y. : Fundamentals of Parallel Multicore Architectures (1st Edition). Chapman & Hall/CRC Computational Science, 2015. ISBN 9781482211184. 2. Sorin, D. J. - Hill, M. D. - Wood, D. A. : A Primer on Memory Consistency and Cache Coherence. Morgan & Claypool Publishers, 2012. ISBN 1608455645. 3. Pllana, S. - Xhafa, F. (Eds) : Programming Multicore and Many-core Computing Systems. Wiley, 2017. ISBN 0470936908. Requirements:
Basic programming skills in C and C++ (similar level to subjects BI-PA1 and BI-PA2), required to pass the subject Parallel and Distributed Programming (MIE-PDP). Recommended passing the subject Effective C++ programming (NI-EPC).
https://courses.fit.cvut.cz/NI-MCC/ The course is also part of the following Study plans:
Study Plan Study Branch/Specialization Role Recommended semester NI-MI.2020 Managerial Informatics V 3 NI-SPOL.2020 Unspecified Branch/Specialisation of Study VO 3 NI-PSS.2020 Computer Systems and Networks PS 3 NI-SPOL.2020 Unspecified Branch/Specialisation of Study VO 3 NI-WI.2020 Web Engineering V 3 NI-NPVS.2020 Design and Programming of Embedded Systems V 3 NI-PB.2020 Computer Security V 3 NIE-DBE.2023 Digital Business Engineering VO 3 NI-ZI.2020 Knowledge Engineering V 3 NI-SP.2020 System Programming V 3 NI-SP.2023 System Programming V 3 NI-TI.2023 Computer Science V 3 NI-TI.2020 Computer Science V 3 NI-SI.2020 Software Engineering (in Czech) V 3 NI-TI.2018 Computer Science V 3
Page updated 20. 4. 2024, semester: L/2023-4, L/2020-1, L/2022-3, L/2021-2, Z/2019-20, Z/2022-3, Z/2020-1, Z/2023-4, L/2019-20, Z/2021-2, Z/2024-5, Send comments to the content presented here to Administrator of study plans Design and implementation: J. Novák, I. Halaška