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A course is the basic teaching unit, it's design as a medium for a student to acquire comprehensive knowledge and skills indispensable in the given field. A course guarantor is responsible for the factual content of the course.
For each course, there is a department responsible for the course organisation. A person responsible for timetabling for a given department sets a time schedule of teaching and for each class, s/he assigns an instructor and/or an examiner.
Expected time consumption of the course is expressed by a course attribute extent of teaching. For example, extent = 2 +2 indicates two teaching hours of lectures and two teaching hours of seminar (lab) per week.
At the end of each semester, the course instructor has to evaluate the extent to which a student has acquired the expected knowledge and skills. The type of this evaluation is indicated by the attribute completion. So, a course can be completed by just an assessment ('pouze zápočet'), by a graded assessment ('klasifikovaný zápočet'), or by just an examination ('pouze zkouška') or by an assessment and examination ('zápočet a zkouška') .
The difficulty of a given course is evaluated by the amount of ECTS credits.
The course is in session (cf. teaching is going on) during a semester. Each course is offered either in the winter ('zimní') or summer ('letní') semester of an academic year. Exceptionally, a course might be offered in both semesters.
The subject matter of a course is described in various texts.

BIE-SAP.21 Computer Structures and Architectures Extent of teaching: 2P+1R+2C
Instructor: Fišer P. Completion: Z,ZK
Department: 18103 Credits: 5 Semester: L

Annotation:
Students understand basic digital computer units and their structures, functions, and hardware implementation: ALU, control unit, memory system, inputs, outputs, data storage and transfer. In the labs, students gain practical experience with the design and implementation of the logic of a simple processor using modern digital design tools.

Lecture syllabus:
1. Introduction, basic architecture of a computer, data representation.
2. Logic functions and their descriptions, combinatorial circuits, implementation using gates.
3. Sequential circuits. Synchronous design, implementation using gates and flip-flops. Mealy and Moore automata.
4. Typical combinatorial and sequential components of a computer, their implementations (encoder, adder, counter, register).
5. Data, its representation and processing.
6. Arithmetic operations with signed numbers. Fix-point and floating point numbers.
7. Implementation of arithmetic operations.
8. Memories - memory cell structure, static and dynamic memories.
9. Cache memories, virtual memory system.
10. Instructions and machine code.
11. Instruction set architecture, addressing modes.
12. Interrupts, buses.
13. Control units, basic types of processors.

Seminar syllabus:
1. Adders, gates, practical implementation.
2. Boolean algebra, minimization, gates.
3. Combinatorial circuits, converters.
4. Minimization, gate-level design, logic functions.
5. Sequential circuits, counter, sequence matching.
6. Sequential design, graph of transitions, table, implementation using D-type flip-flops and gates.
7. Architecture of the AVR processor, sample program.
8. Arithmetics, addition, negative numbers, overflow, complement code.
9. Program - shifts, ASCII.
10. Test, project assignment. Assembler.
11. Project work - display.
12. Arithmetic programs, shifts, control of peripherals.
13. Project result presentations.

Literature:
1. Patterson D. A., Hennessy J. L. : Computer Organization and Design: The Hardware/Software Interface (5th Edition). Morgan Kaufmann, 2014. ISBN 978-0128012857.
2. Wakerly J. F. : Digital Design: Principles and Practices (5th Edition). Pearson, 2018. ISBN 978-0134460093.
3. Mano M.M., Ciletti M.D. : Digital Design: With an Introduction to the Verilog HDL, VHDL, and SystemVerilog (6th Edition). Pearson, 2017. ISBN 978-0134549897.

Requirements:
Input knowledge: Basic knowledge of physical principles of digital circuits (transistors as switches, implementation of registers, data storage principles) and fundamentals of discrete mathematics (number representation systems, Boolean algebra).

Information about the course and courseware are available at https://courses.fit.cvut.cz/BIE-SAP/

The course is also part of the following Study plans:
Study Plan Study Branch/Specialization Role Recommended semester
BIE-PI.21 Computer Engineering 2021 PP 2
BIE-PV.21 Computer Systems and Virtualization 2021 PP 2
BIE-PS.21 Computer Networks and Internet 2021 PP 2
BIE-TI.21 Computer Science 2021 PP 2
BIE-SI.21 Software Engineering 2021 PP 2
BIE-IB.21 Information Security 2021 (Bachelor in English) PP 2


Page updated 18. 4. 2024, semester: L/2020-1, L/2023-4, L/2019-20, Z/2021-2, L/2022-3, Z/2023-4, Z/2019-20, Z/2022-3, L/2021-2, Z/2024-5, Z/2020-1, Send comments to the content presented here to Administrator of study plans Design and implementation: J. Novák, I. Halaška