Main page | Study Branches/Specializations | Groups of Courses | All Courses | Roles                Instructions

A course is the basic teaching unit, it's design as a medium for a student to acquire comprehensive knowledge and skills indispensable in the given field. A course guarantor is responsible for the factual content of the course.
For each course, there is a department responsible for the course organisation. A person responsible for timetabling for a given department sets a time schedule of teaching and for each class, s/he assigns an instructor and/or an examiner.
Expected time consumption of the course is expressed by a course attribute extent of teaching. For example, extent = 2 +2 indicates two teaching hours of lectures and two teaching hours of seminar (lab) per week.
At the end of each semester, the course instructor has to evaluate the extent to which a student has acquired the expected knowledge and skills. The type of this evaluation is indicated by the attribute completion. So, a course can be completed by just an assessment ('pouze zápočet'), by a graded assessment ('klasifikovaný zápočet'), or by just an examination ('pouze zkouška') or by an assessment and examination ('zápočet a zkouška') .
The difficulty of a given course is evaluated by the amount of ECTS credits.
The course is in session (cf. teaching is going on) during a semester. Each course is offered either in the winter ('zimní') or summer ('letní') semester of an academic year. Exceptionally, a course might be offered in both semesters.
The subject matter of a course is described in various texts.

BIE-JPO Computer Units Extent of teaching: 2P+2C
Instructor: Completion: Z,ZK
Department: 18103 Credits: 5 Semester: Z

Annotation:
Students know the internal structure and organization of computer or processor components and their interfacing with the environment. They understand the organization of main memory and other internal memories (addressable, LIFO, FIFO and CAM). They know the organization of an arithmetic unit. They learn the design methodology for control units and controllers, as well as basic principles of communication with peripheral devices and buses. They understand the architecture of a bus system.

Lecture syllabus:
1. Organization and structure of von Neumann computers.
2. Binary adders, subtractors, and shifters.
3. Arithmetic and logic unit of a simple processor.
4. Control unit and controllers; microprogrammed control unit.
5. Wired control unit.
6. Binary multiplication and division and their implementation.
7. Floating point representation.
8. Basic principles of error detection and correction.
9. Linear and cyclic codes.
10. Main memory - possible organizations and interfaces.
11. Other internal memories, their organization and use - addressable memories, LIFO, FIFO, CAM.
12. I/O units and their control - DMA, channels and I/O processors.
13. Buses - types, modes, arbitration.

Seminar syllabus:
1. Number systems, conversions and operations.
2. Representations of negative numbers.
3. Simple processor - instructions, machine code, data part.
4. Simple processor - instruction cycle, interface.
5. Simple processor - microprogramming.
6. Simple processor - demonstration of a microprogram.
7. Wired controller design.
8. Multipliers and dividers.
9. Floating point representation.
10. [2] Design of a processor component on FPGA.
11. Demonstration of the designed processor component.
12. Error detection codes.

Literature:
1. Hennesy, J. L., Patterson, D. A. ''Computer Architecture: A Quantitative Approach, Third Edition''. Morgan Kaufmann, 2002. ISBN 1558605967.
2. Tanenbaum, A. S. ''Structured Computer Organization (5th Edition)''. Prentice Hall, 2005. ISBN 0131485210.
3. Stallings, W. ''Computer Organization and Architecture: Designing for Performance (7th Edition)''. Prentice Hall, 2005. ISBN 0131856448.
4. Hamacher, C., Vranesic, Z., Zaky, S. ''Computer Organization''. McGraw-Hill, 2001. ISBN 0072320869.

Requirements:
Basic knowledge of the structure and architecture of a digital computer, design principles for combinational and sequential circuits, binary arithmetic, principles of computer memory.

Information about the course and courseware are available at https://courses.fit.cvut.cz/BIE-JPO/

The course is also part of the following Study plans:
Study Plan Study Branch/Specialization Role Recommended semester
BIE-TI.21 Computer Science 2021 V 3
BIE-SI.21 Software Engineering 2021 V 3
BIE-PV.21 Computer Systems and Virtualization 2021 V 3
BIE-IB.21 Information Security 2021 (Bachelor in English) V 3


Page updated 29. 3. 2024, semester: L/2021-2, Z,L/2023-4, Z/2021-2, Z/2020-1, Z/2019-20, L/2020-1, Z,L/2022-3, L/2019-20, Send comments to the content presented here to Administrator of study plans Design and implementation: J. Novák, I. Halaška