A course is the basic teaching unit, it's design as a medium for a student to acquire comprehensive knowledge and skills indispensable in the given field. A course guarantor is responsible for the factual content of the course.
For each course, there is a department responsible for the course organisation. A person responsible for timetabling for a given department sets a time schedule of teaching and for each class, s/he assigns an instructor and/or an examiner.
Expected time consumption of the course is expressed by a course attribute extent of teaching. For example, extent = 2 +2 indicates two teaching hours of lectures and two teaching hours of seminar (lab) per week.
At the end of each semester, the course instructor has to evaluate the extent to which a student has acquired the expected knowledge and skills. The type of this evaluation is indicated by the attribute completion. So, a course can be completed by just an assessment ('pouze zápočet'), by a graded assessment ('klasifikovaný zápočet'), or by just an examination ('pouze zkouška') or by an assessment and examination ('zápočet a zkouška') .
The difficulty of a given course is evaluated by the amount of ECTS credits.
The course is in session (cf. teaching is going on) during a semester. Each course is offered either in the winter ('zimní') or summer ('letní') semester of an academic year. Exceptionally, a course might be offered in both semesters.
The subject matter of a course is described in various texts.
| BI-SAP |
Computer Structure and Architecture |
Extent of teaching: |
2P+1R+2C |
| Instructor: |
|
Completion: |
Z,ZK |
| Department: |
18103 |
Credits: |
6 |
Semester: |
L |
Annotation:
Students understand basic digital computer units and their structures, functions, and hardware implementation: ALU, control unit, memory system, inputs, outputs, data storage and transfer. In the labs, students gain practical experience with the design and implementation of the logic of a simple processor using modern digital design tools. The subject teaches basic knowledge of digital computer construction principles, how a computer performs its operations, what is machine code, and what are its connections to higher programming languages.
Lecture syllabus:
| 1. | | Computer organization, units and their interfaces. |
| 2. | | Logic functions, combinatorial components, gate-level design. |
| 3. | | Structure of sequential components, description and implementation. Mealy and Moore type of implementation. |
| 4. | | Typical combinatorial and sequential components of a computer. |
| 5. | | Data, storage and processing. |
| 6. | | Representation of negative numbers, fix-point and floating point numbers. |
| 7. | | Implementation of arithmetic operations. |
| 8. | | Instruction set architecture and machine code. |
| 9. | | Memory structures and design principles. Error detection and correction linear codes. |
| 10. | | Computer memory system. Memory hierarchy, virtulization, cache. |
| 11. | | Input-output components, buses and communication. |
| 12. | | Procesor architecture, control units design in practice. |
Seminar syllabus:
| 1. | | Adders, gates, implementation using EDA tools in design kit. |
| 2. | | Bolean algebra, minimisation. |
3 Typical combination circuits, convertors, arithmetic circuits.
| 4. | | Combinatorial components design (gate level). |
| 5. | | Implementation of simple sequential components. |
| 6. | | Implementation of sequential components. |
| 7. | | AVR processor, demo. |
| 8. | | AVR implementation of arithmetic functions. |
| 9. | | Simple program, machine code, shifters. |
| 10. | | Semestral homework. |
| 11. | | Machine code debugging. |
| 12. | | Arithmetic asembler programs, homework presentation. |
13, Assessment.
.
Literature:
| 1. | | Douša, J., Pluháček, A. Introduction to Computer Systems. Praha: ČVUT, 2000. ISBN 80-01-02103-3. |
Requirements:
Basic knowledge of physical principles of digital circuits (transistors as switches, implementation of registers, data storage principles) and fundamentals of discrete mathematics (number representation systems, Boolean algebra).
The course is also part of the following Study plans:
| Page updated
26. 4. 2024, semester: Z/2020-1, L/2021-2, L/2019-20, L/2022-3, Z/2019-20, L/2020-1, L/2023-4, Z/2022-3, Z/2021-2, Z/2023-4, Z/2024-5, Send comments to the content presented here to Administrator of study plans |
Design and implementation:
J. Novák,
I. Halaška |